In such applications, a control unit called a full authority digital engine controller (FADEC) is known that comprises a microcontroller incorporating a software operating system for executing computer applications tasks. These applications may be executed in full or in part in simultaneous manner. The operating system incorporates a real time core, i.e. it is a real time operating system (RTOS) for managing the execution of applications and for ensuring that data is routed between two applications and between the applications and the hardware. Partitioning is provided with partitions that are allocated to each application in order to avoid applications interfering with one another while they are being executed. In the field of aviation, such partitioning is governed by the ARINC 653 standard that provides for space-division partitioning, thereby guaranteeing that an application cannot write in a memory zone corresponding to a partition of another application, and for time-division partitioning that guarantees that some execution time is allocated to each application. This partitioning makes it possible to have applications from different suppliers and/or of different degrees of criticality. Real time cores that are compatible with the ARINC 653 standard are nevertheless burdensome and they present the drawback of the partitioning being performed purely in software, such that it might be rendered ineffective by an application executing outside the control of the real time core.
Furthermore, in multi-tasking cores, when the core scheduler instructs a changeover from a first task to a second task, the context of the first task (i.e. all of the state values of the microcontroller that are needed for its execution and that are recorded in particular in the memory registers of the microcontroller) need to be backed up while the context of the second task needs to be found and restored. Changes of context are thus relatively time-consuming, particularly since microcontrollers have ever-increasing numbers of registers for backing up. Partition changes are just as lengthy, for the same reasons. This constitutes an additional drawback for multi-tasking cores compatible with the ARINC 653 standard.